Digital Timing Macromodeling for VLSI Design Verification (Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture and Digital Signal Processing) - Primera edición
1995, ISBN: 0792395808
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Digital Timing Macromodeling for VLSI Design Verification (Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture and Digital Signal Processing) - Primera edición
1995, ISBN: 0792395808
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[EAN: 9780792395805], D'occasion, très bon état, [SC: 5.7], [PU: Kluwer Academic Publishers, Norwell, Massachusetts, U.S.A.], White hardcover with white lettering on spine and upper board… Más…
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Digital Timing Macromodeling for VLSI Design Verification (Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture and Digital Signal Processing) - Primera edición
1995, ISBN: 0792395808
Pasta dura
[EAN: 9780792395805], Gebraucht, sehr guter Zustand, [PU: Kluwer Academic Publishers, Norwell, Massachusetts, U.S.A.], White hardcover with white lettering on spine and upper board and co… Más…
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Digital Timing Macromodeling for VLSI Design Verification (Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture and Digital Signal Processing) - encuadernado, tapa blanda
1995, ISBN: 9780792395805
Norwell, Massachusetts, U.S.A.: Kluwer Academic Publishers, 1995. White hardcover with white lettering on spine and upper board and contents in very good clean condition, showing minimal … Más…
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ISBN: 0792395808
Digital Timing Macromodeling for VLSI Design Verification ab 181.99 € als gebundene Ausgabe: Auflage 1995. Aus dem Bereich: Bücher, Wissenschaft, Technik, Medien > Bücher, Springer US
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Digital Timing Macromodeling for VLSI Design Verification (Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture and Digital Signal Processing) - Primera edición
1995, ISBN: 0792395808
Pasta dura
[EAN: 9780792395805], Gebraucht, sehr guter Zustand, [SC: 5.79], [PU: Kluwer Academic Publishers, Norwell, Massachusetts, U.S.A.], White hardcover with white lettering on spine and upper … Más…
Kong, Jeong-Taek; Overhauser, David:
Digital Timing Macromodeling for VLSI Design Verification (Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture and Digital Signal Processing) - Primera edición1995, ISBN: 0792395808
Pasta dura
[EAN: 9780792395805], D'occasion, très bon état, [SC: 5.7], [PU: Kluwer Academic Publishers, Norwell, Massachusetts, U.S.A.], White hardcover with white lettering on spine and upper board… Más…
Digital Timing Macromodeling for VLSI Design Verification (Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture and Digital Signal Processing) - Primera edición
1995
ISBN: 0792395808
Pasta dura
[EAN: 9780792395805], Gebraucht, sehr guter Zustand, [PU: Kluwer Academic Publishers, Norwell, Massachusetts, U.S.A.], White hardcover with white lettering on spine and upper board and co… Más…
Digital Timing Macromodeling for VLSI Design Verification (Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture and Digital Signal Processing) - encuadernado, tapa blanda
1995, ISBN: 9780792395805
Norwell, Massachusetts, U.S.A.: Kluwer Academic Publishers, 1995. White hardcover with white lettering on spine and upper board and contents in very good clean condition, showing minimal … Más…
ISBN: 0792395808
Digital Timing Macromodeling for VLSI Design Verification ab 181.99 € als gebundene Ausgabe: Auflage 1995. Aus dem Bereich: Bücher, Wissenschaft, Technik, Medien > Bücher, Springer US
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Detalles del libro - Digital Timing Macromodeling for VLSI Design Verification
EAN (ISBN-13): 9780792395805
ISBN (ISBN-10): 0792395808
Tapa dura
Año de publicación: 1995
Editorial: Springer-Verlag GmbH
292 Páginas
Peso: 0,602 kg
Idioma: eng/Englisch
Libro en la base de datos desde 2007-10-21T19:40:29+02:00 (Madrid)
Página de detalles modificada por última vez el 2023-10-27T21:27:12+02:00 (Madrid)
ISBN/EAN: 0792395808
ISBN - escritura alterna:
0-7923-9580-8, 978-0-7923-9580-5
Mode alterno de escritura y términos de búsqueda relacionados:
Autor del libro: jeong, kong, overhaus
Título del libro: engineering design, digital timing macromodeling for vlsi design verification, digital design and computer architecture, design and the computer, architecture science
Datos del la editorial
Autor: Jeong-Taek Kong; David V. Overhauser
Título: The Springer International Series in Engineering and Computer Science; Digital Timing Macromodeling for VLSI Design Verification
Editorial: Springer; Springer US
265 Páginas
Año de publicación: 1995-05-31
New York; NY; US
Idioma: Inglés
160,49 € (DE)
164,99 € (AT)
177,00 CHF (CH)
Available
XXI, 265 p.
BB; Hardcover, Softcover / Technik/Elektronik, Elektrotechnik, Nachrichtentechnik; Schaltkreise und Komponenten (Bauteile); Verstehen; Modulation; VLSI; computer-aided design (CAD); design; development; history; integrated circuit; interconnect; model; modeling; simulation; tables; transistor; transmission; verification; Electronic Circuits and Systems; Computer-Aided Engineering (CAD, CAE) and Design; Electrical and Electronic Engineering; Computer-Aided Design (CAD); Elektrotechnik; BC
1 Introduction.- 1.1 Overview of the VLSI Design and Verification Process.- 1.2 Problems in MOS Digital Macromodeling.- 1.3 Contributions of The New Macromodel.- 2 Survey of Simulation and Macromodeling Techniques.- 2.1 Introduction.- 2.2 Circuit Simulation.- 2.3 Macromodeling.- 2.4 Gate-level and Switch-level Simulation.- 2.5 Switch-level Timing Simulation.- 2.6 Fast-timing Simulation.- 2.7 Interconnection Analysis.- 2.8 Mixed-mode/Mixed-domain Simulation.- 3 A Nonlinear Macromodel.- 3.1 Introduction.- 3.2 A Macromodel for the General Case.- 3.3 Macromodeling with Fast Input Transitions.- 3.4 Slow Input and Fast Output Transitions.- 3.5 Experimental Results.- 4 Reduction Techniques for Complex Gates.- 4.1 Introduction.- 4.2 Reduction of Series-connected Transistors.- 4.3 Generalized Reduction Techniques for Complex Gates.- 4.4 Experimental Results.- 5 Accounting for RC-Interconnects.- 5.1 Introduction.- 5.2 Related Work.- 5.3 RC-interconnect Effects.- 5.4 Modeling the Effective Driver-loading.- 5.5 Driver Output Waveform Estimation.- 5.6 Experimental Results.- 6 Transmission Gate Modeling.- 6.1 Introduction.- 6.2 A Gate Driving a Transmission Gate.- 7 Conclusions.- 7.1 Summary.- 7.2 Future Research.- A The Spice Level 2 Model.- B Nonlinear Macromodel Output Response Derivations.- B.1 The Derivation of the Output Response in Region III.- B.2 The Derivation of the Output Response in Region VI.- D Delay Errors for Various AOI Gates.- References.Más, otros libros, que pueden ser muy parecidos a este:
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