2012, ISBN: 9781461413585
This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures. Readers will … Más…
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2013, ISBN: 1461413583
This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures. Readers will learn… Más…
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System-Level Validation High-Level Modeling and Directed Test Generation Techniques - encuadernado, tapa blanda
2012, ISBN: 1461413583
2013 Gebundene Ausgabe Elektronik / Mikroelektronik, Mikroelektronik, Elektronik, Rechnerarchitektur und Logik-Entwurf, Automatictestgeneration; embeddedsystems; High-levelmodeling; Int… Más…
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System-Level Validation High-Level Modeling and Directed Test Generation Techniques - encuadernado, tapa blanda
2012, ISBN: 1461413583
2013 Gebundene Ausgabe Elektronik / Mikroelektronik, Mikroelektronik, Elektronik, Rechnerarchitektur und Logik-Entwurf, Automatictestgeneration; embeddedsystems; High-levelmodeling; Int… Más…
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System-Level Validation High-Level Modeling and Directed Test Generation Techniques 2013 - libro usado
2012, ISBN: 9781461413585
2013 Buchschnitt verkürzt - gepflegter, sauberer Zustand - Ausgabejahr 2013 22558222/12 Versandkostenfreie Lieferung Integrated Circuit Design,System-level verification,UML,System-on-Chip… Más…
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2012, ISBN: 9781461413585
This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures. Readers will … Más…
2013, ISBN: 1461413583
This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures. Readers will learn… Más…
System-Level Validation High-Level Modeling and Directed Test Generation Techniques - encuadernado, tapa blanda
2012
ISBN: 1461413583
2013 Gebundene Ausgabe Elektronik / Mikroelektronik, Mikroelektronik, Elektronik, Rechnerarchitektur und Logik-Entwurf, Automatictestgeneration; embeddedsystems; High-levelmodeling; Int… Más…
System-Level Validation High-Level Modeling and Directed Test Generation Techniques - encuadernado, tapa blanda
2012, ISBN: 1461413583
2013 Gebundene Ausgabe Elektronik / Mikroelektronik, Mikroelektronik, Elektronik, Rechnerarchitektur und Logik-Entwurf, Automatictestgeneration; embeddedsystems; High-levelmodeling; Int… Más…
System-Level Validation High-Level Modeling and Directed Test Generation Techniques 2013 - libro usado
2012, ISBN: 9781461413585
2013 Buchschnitt verkürzt - gepflegter, sauberer Zustand - Ausgabejahr 2013 22558222/12 Versandkostenfreie Lieferung Integrated Circuit Design,System-level verification,UML,System-on-Chip… Más…
Datos bibliográficos del mejor libro coincidente
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Detalles del libro - System-Level Validation
EAN (ISBN-13): 9781461413585
ISBN (ISBN-10): 1461413583
Tapa dura
Año de publicación: 2012
Editorial: Springer-Verlag New York Inc.
264 Páginas
Peso: 0,552 kg
Idioma: Englisch
Libro en la base de datos desde 2009-07-11T09:58:53+02:00 (Madrid)
Página de detalles modificada por última vez el 2024-02-29T03:14:14+01:00 (Madrid)
ISBN/EAN: 1461413583
ISBN - escritura alterna:
1-4614-1358-3, 978-1-4614-1358-5
Mode alterno de escritura y términos de búsqueda relacionados:
Autor del libro: mishra, ming, qin, chen
Título del libro: validation, generation maybe, test, the system, level, chen
Datos del la editorial
Autor: Mingsong Chen; Xiaoke Qin; Heon-Mo Koo; Prabhat Mishra
Título: System-Level Validation - High-Level Modeling and Directed Test Generation Techniques
Editorial: Springer; Springer US
250 Páginas
Año de publicación: 2012-09-19
New York; NY; US
Impreso en
Peso: 5,325 kg
Idioma: Inglés
106,99 € (DE)
109,99 € (AT)
118,00 CHF (CH)
POD
XXII, 250 p.
BB; Circuits and Systems; Hardcover, Softcover / Technik/Elektronik, Elektrotechnik, Nachrichtentechnik; Schaltkreise und Komponenten (Bauteile); Verstehen; Automatic test generation; Embedded Systems; High-level modeling; Integrated Circuit Design; System-level verification; System-on-Chip verification; SystemC; Transaction level modeling; UML; Electronics and Microelectronics, Instrumentation; Processor Architectures; Electronic Circuits and Systems; Electronics and Microelectronics, Instrumentation; Processor Architectures; Elektronik; Rechnerarchitektur und Logik-Entwurf; BC; EA
This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures. Readers will learn to avoid time-consuming and error-prone validation from the comprehensive coverage of system-level validation, including high-level modeling of designs and faults, automated generation of directed tests, and efficient validation methodology using directed tests and assertions. The methodologies described in this book will help designers to improve the quality of their validation, performing as much validation as possible in the early stages of the design, while reducing the overall validation effort and cost.Más, otros libros, que pueden ser muy parecidos a este:
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